[OpenBIOS] memory on 440GX+
Ronald G. Minnich
rminnich at lanl.gov
Tue Feb 15 13:18:18 CET 2000
OK, I forgot to set reg. 57 on the bridge chip. I set it to 0x12, which is
normal (not registered) sdram and 31 microsecond refresh. Life is *much*
better, save my SDRAM is only 8 bytes (yes, bytes) in extent.
On to the next problem ...
ron
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